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Physical Design Engineer
Job Summary
Job Category
Telecom / ISP - Semiconductors/ Electronics
Location
Bangalore (Karnataka)
Last Date
30 September, 2011
Eligibility
UG - B.Tech/B.E. - Electronics/Telecomunication PG - M.Tech - Electronics/Telecomunication
Job Role
Testing Engnr
Experience
0 - 2 Years
Job Type
Full time
Posted On : 23 September, 2011
Job Description
Should have understanding on Complex Full chip floor planning with multiple power domains.Should be able to support in sign-off block level P&R responsibility.Knowledge about the issues related to lower tech nodes (40nm and below).Work with FE team in cleaning up the timing constraints related to complex interfaces like DDR3 and ARM Cortex A9.SoC Encounter tool knowledge highly preferable.Should have understanding about sign-off timing closure, ecos, low power formats (CPF/UPF) and design closure.Good communications skills, both verbal and writing.
Key Skills
Good communications skills, both verbal and writing.
About Company
ST-Ericsson is a world leader in development of wireless platforms and
semiconductors. ST-Ericsson enables smarter communication, mobile
entertainment, as well as benefits of access to mobile and broadband
connectivity to people around the globe.ST-Ericsson is unique in its ability to deliver state-of-the-art
platforms, integrating mobile multimedia and connectivity for GSM, EDGE,
WCDMA, HSPA, TD-SCDMA and LTE. The company is a leading supplier to the
top handset manufacturers, as well as to other exciting industry
leaders, including mobile operators and device manufacturers.
Contact Information
Company Name
: ST ERICSSON
Company website
Executive Name
: Not Mentioned
Telephone
: Not Mentioned
For More Details
: Not Mentioned
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